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Synopsys Provides Electronic Design Automation Solution for Sun Microsystems' UltraSPARC T1 Processor

Processor Implementation and Verification Enabled by Powerful Tools From Synopsys' Galaxy and Discovery Platforms

MOUNTAIN VIEW, Calif., March 21 /PRNewswire-FirstCall/ -- Synopsys, Inc. , a world leader in semiconductor design software, today announced Synopsys' Galaxy(TM) Design and Discovery (TM) Verification Platform support for Sun Microsystems' UltraSPARC(R) T1(TM) processor, for which Sun recently announced the release of hardware design specifications under an open-source GNU GPL license. This same extensive portfolio of electronic design automation (EDA) tools has been used by the Sun Microsystems engineering team to implement and verify the UltraSPARC T1 processor in silicon. The availability of the UltraSPARC T1 processor design, coupled with Synopsys' extensive global user community and large university program membership will help enable innovation in the area of chip multi-threading (CMT) processor architecture design.

The UltraSPARC T1 processor with CoolThreads technology is an industry standard multithreaded processor with up to eight 4-way multithreaded cores and a typical processor power consumption of 72 watts, delivering 32 simultaneous threads. Sun recently announced that it is making the UltraSPARC T1 processor hardware design and verification suite available to the engineering community via an open source model. The open source release will yield new hardware, software, tools and applications which can be readily produced.

"We're opening the doors of innovation for everyone to participate," said Shrenik Mehta, director of Frontend Technologies and OpenSPARC Program, Scalable Systems Group, Sun Microsystems Inc. "We use Synopsys' tools for synthesis, verification, testbench and physical implementation to help ensure our most advanced processors deliver the high performance our customers expect from us. Our OpenSPARC T1 release contains everything the engineering and academic world will need to get started with our UltraSPARC T1 design using Synopsys' synthesis and functional verification tools. This in turn, will help drive more design innovation within these important communities."

Sun's UltraSPARC T1 open source release includes synthesizable Verilog RTL source code, OpenVera(R) test suites, monitors, and coverage objects as well as scripts supporting the use of Synopsys' Design Compiler(R) synthesis and VCS(R) RTL verification tools. For the development and verification of the UltraSPARC T1, Sun Microsystems engineers used the Galaxy Design Platform solution for RTL synthesis, design planning, physical synthesis, place and route, and timing sign-off, and the Discovery Verification Platform for RTL verification, testbench automation, transistor-level analysis, and formal verification of custom logic and memories.

"Sun and Synopsys have been long-time collaborators in the engineering and academic communities, offering a breadth of solutions for complex design and verification challenges," said Rich Goldman, vice president, Strategic Market Development at Synopsys. "With the introduction of Sun's OpenSPARC initiative, design engineers, researchers and educators alike can benefit from the combination of Synopsys' advanced EDA tools and Sun's unique chip multi-threading technology."

First-ever MultiCore Expo

Sun's new UltraSPARC T1 processor will be shown at this week's MultiCore Expo in Santa Clara from March 21-23. Sun's David Yen, executive vice-president of the Scalable Systems Group, will kick-off the event with his keynote on multicore architectures on March 21st at 9:30 a.m. Synopsys' Rich Goldman will join Mr. Yen on stage to underscore Synopsys' support of Sun's open source UltraSPARC T1 processor. The MultiCore Expo is the industry's first conference dedicated to delivering real developer solutions for multicore and multiprocessing designs. For more information, please visit http://www.multicore-expo.com/ .

About Synopsys

Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Design Compiler, VCS and OpenVera are registered trademarks of Synopsys, Inc. Discovery and Galaxy are trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Editorial Contacts: Carole Murchison Synopsys, Inc. 650-584-4632 [email protected] Khyati Shah Edelman 650-429-2769 [email protected]

Synopsys, Inc.

CONTACT: Carole Murchison of Synopsys, Inc., +1-650-584-4632, or
[email protected]; or Khyati Shah of Edelman, +1-650-429-2769, or
[email protected], for Synopsys

Web site: http://www.multicore-expo.com/

Web site: http://www.synopsys.com/

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